inv-schematics/inverter_proto-cache.lib

EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Device_R
#
DEF Device_R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "Device_R" 0 0 50 V V C CNN
F2 "" -70 0 50 V I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
 R_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_Transformer_1P_1S
#
DEF Device_Transformer_1P_1S T 0 40 Y N 1 F N
F0 "T" 0 250 50 H V C CNN
F1 "Device_Transformer_1P_1S" 0 -300 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
A -100 -150 50 899 1 0 1 0 N -100 -100 -50 -150
A -100 -150 50 -1 -899 0 1 0 N -50 -150 -100 -199
A -100 -50 50 899 1 0 1 0 N -100 0 -50 -50
A -100 -50 50 -1 -899 0 1 0 N -50 -50 -100 -99
A -100 50 50 899 1 0 1 0 N -100 100 -50 50
A -100 50 50 -1 -899 0 1 0 N -50 50 -100 1
A -100 150 50 899 1 0 1 0 N -100 200 -50 150
A -100 150 50 -1 -899 0 1 0 N -50 150 -100 101
A 100 -50 50 899 -1799 0 1 0 N 100 0 51 -50
A 100 -50 50 1799 -899 0 1 0 N 51 -50 100 -99
A 100 50 50 899 -1799 0 1 0 N 100 100 51 50
A 100 50 50 1799 -899 0 1 0 N 51 50 100 1
A 100 150 50 899 -1799 0 1 0 N 100 200 51 150
A 100 150 50 1799 -899 0 1 0 N 51 150 100 101
A 101 -150 50 910 -1799 0 1 0 N 101 -100 52 -150
A 101 -150 50 -912 -1799 0 1 0 N 101 -199 52 -150
P 2 0 1 0 -25 200 -25 -200 N
P 2 0 1 0 25 -200 25 200 N
X AA 1 -400 200 300 R 50 50 1 1 P
X AB 2 -400 -200 300 R 50 50 1 1 P
X SA 3 400 -200 300 L 50 50 1 1 P
X SB 4 400 200 300 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Transistor_BJT_2N2219
#
DEF Transistor_BJT_2N2219 Q 0 0 Y N 1 F N
F0 "Q" 200 75 50 H V L CNN
F1 "Transistor_BJT_2N2219" 200 0 50 H V L CNN
F2 "Package_TO_SOT_THT:TO-39-3" 200 -75 50 H I L CIN
F3 "" 0 0 50 H I L CNN
ALIAS BC140 BC141
$FPLIST
 TO?39*
$ENDFPLIST
DRAW
C 50 0 111 0 1 10 N
P 2 0 1 0 25 25 100 100 N
P 3 0 1 0 25 -25 100 -100 100 -100 N
P 3 0 1 20 25 75 25 -75 25 -75 N
P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
X E 1 100 -200 100 U 50 50 1 1 P
X B 2 -200 0 225 R 50 50 1 1 P
X C 3 100 200 100 D 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Transistor_BJT_2N3905
#
DEF Transistor_BJT_2N3905 Q 0 0 Y N 1 F N
F0 "Q" 200 75 50 H V L CNN
F1 "Transistor_BJT_2N3905" 200 0 50 H V L CNN
F2 "Package_TO_SOT_THT:TO-92_Inline" 200 -75 50 H I L CIN
F3 "" 0 0 50 H I L CNN
ALIAS 2N3905
$FPLIST
 TO?92*
$ENDFPLIST
DRAW
C 50 0 111 0 1 10 N
P 2 0 1 0 25 25 100 100 N
P 3 0 1 0 25 -25 100 -100 100 -100 N
P 3 0 1 20 25 75 25 -75 25 -75 N
P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
X E 1 100 -200 100 U 50 50 1 1 P
X B 2 -200 0 225 R 50 50 1 1 I
X C 3 100 200 100 D 50 50 1 1 P
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# pspice_VSOURCE
#
DEF pspice_VSOURCE V 0 40 Y Y 1 F N
F0 "V" -250 300 50 H V C CNN
F1 "pspice_VSOURCE" 0 0 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C 0 0 200 0 1 0 N
T 0 -320 -10 50 0 0 1 V Normal 0 C C
P 2 0 1 0 -250 -250 -250 150 F
P 3 0 1 0 -300 150 -250 250 -200 150 F
X E1 1 0 300 100 D 50 50 1 1 I
X E2 2 0 -300 100 U 50 50 1 1 I
ENDDRAW
ENDDEF
#
#End Library